Add pmu-fw and ATF flags to enable warm restart, recovery, escalation.Add remoteproc.dtsi to allow remoteproc to load the rpu binaries.
Modify device tree source file (dts) of Linux to exclude PL IPs that are not part of APU subsystem.Prepare Petalinux project with following changes w.r.t default 2018.3 bsp.Define the subsystem using the isolation configuration menu in Vivado and export to hdf.Refer to the next section for a detailed example. For more details on any of these steps, refer to UG1137 Software Developer's Guide, Chapter 12. The following steps describe how to implement subsystem restart. This page describes an example of how to design a project with multiple subsystems in it, and how to cleanly reset each one.
A subsystem in Zynq UltraScale+ is composed of all of the components of a particular operating system. Subsystem restarts include APU subsystems and RPU subsystem restarts. Full system resets include Power On Reset (POR), system-reset and PS-only-reset. Resets for Zynq UltraScale+ are broadly divided into two categories, full system resets and subsystem restarts. However, designer must make sure that valid and clean code for system/subsystem is located at the reset vector in order to bring the system back to a clean running state. Reset to the software results in the processor starting from the reset vector.
Reset to the hardware includes resetting of the processor, all peripherals associated with the system/subsystem, cleaning up of the memory as needed, and making sure that the interconnect is in a clean state, capable of routing traffic. In any system or subsystem which has a processor component and a programmable logic component, reset must entail both reset to the hardware as well as software. Zynq UltraScale+ MPSOC supports various type of reset from the simplest system reset to the much more complicated subsystem restart.
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